1. Field of the Invention
The present invention generally relates to a structure of silicon-controlled rectifier (SCR) in a CMOS (complementary metal oxide semiconductor) device, and more particularly to bridging modified lateral silicon controlled rectifier of first conductivity type (PMSCR) with guard ring controlled circuit for electrostatic discharge (ESD) protection.
2. Description of the Prior Art
SCRs (Silicon controlled rectifier) are knows as thyristors. The SCRs are used extensively in power device application because of the capability to switch from a very high impedance state to a very low impedance state. For the same reason a properly designed SCR can also be a very efficient electrostatic discharge (ESD) protection circuit.
Referring to FIG. 1, the PMSCR structure (bridging modified lateral silicon controlled rectifier of first conductivity type) 110 with guard ring is formed within a substrate 100. The PMSCR structure 110 with guard ring having a first lightly doped well region 112 of a second conductivity type such as N type, and a second lightly doped well region 114 of the first conductivity type such as P type. A N+ region 118 is formed in the first lightly doped well region 112, and is electrically coupled to the anode 150, and a P+ region 124 is formed in the second lightly doped well region 114, and is electrically coupled to the cathode 160. A P+ region 120 is formed in the first lightly doped well region 112, and is electrically coupled to the anode 150. A N+ region 122 is formed in the second lightly doped well region 114, and is electrically coupled to the cathode 160. An N+ region 126 is formed in the first lightly doped well region 112, and is electrically coupled to the anode 150. A P+ region 128 is formed in the first lightly doped well region 112 and the second lightly doped well region 114 such that the P+ region 128 overlaps a junction 116 between the first lightly doped well region 112 and second lightly doped well region 114. A field insulator region 130 is formed in the first lightly doped well region 112, and is formed between N+ region 118 and P+ region 120. In addition, another field insulator region 132 is formed in the first lightly doped well region 112, and is formed between the P+ region 120 and N+ region 126. Then, a field insulator region 134 is formed in the first lightly doped well region 112, and is formed between the N+ region 126 and P+ region 128. A field insulator region 136 is formed in the second lightly doped well region 114, and is formed between the P+ region 128 and N+ region 122. Next, a field insulator region 138 is formed in the second lightly doped well region 114, and is formed between the N+ region 122 and P+ region 124.
In the PMSCR structure, an additional N+ region 126 is used as a guard ring to collect the electrons that from the cathode 160 to the anode 150, such that when the trigger voltage is applied to the PMSCR structure 110, the guard ring can prevent damage from voltage latch-up during normal operation. Therefore, the power-zapping immunity of the PMSCR structure can be improved. Nevertheless, in the PMSCR structure 110, the worse ESD performance since the N guard ring will collect the electrons when SCR triggers.
Referring to FIG. 2 is a schematic representation showing a PMSCR 210 with an additional N well guard ring structure 214. The PMSCR with N well guard ring structure 210 is formed within the substrate 200. The PMSCR with N well guard ring structure 210 having a first lightly doped well region 212 of the second conductivity type such as N type, a second lightly doped well region 214 of the second conductivity type, and a third lightly doped well region 216 of first conductivity type, wherein the second lightly doped well region is used as a guard ring to collect the electrons. An N+ region 224 is formed in the first lightly doped well region 212, and is electrically coupled to the anode 260. A P+ region 226 is formed in the first lightly doped well region 216, and is electrically coupled to the anode 260. A N+ region 228 is formed in the third lightly doped well region 216, and is electrically coupled to the cathode 280. A P+ region 230 is formed in the third lightly doped well region 216, and is electrically coupled to the cathode 280. A N+ region 232 instead of P+ region 128 of the PMSCR with N guard ring 110 (as shown in FIG. 1) is formed in the second lightly doped well region 214, and is coupled to a high voltage node 270. An P+ region 234 instead of the N+ region 126 of the PMSCR with N ring structure 110 is formed between the substrate 200 and the first lightly doped well region 212, such that the P+ region 234 overlaps a first junction 218 between the substrate 200 and the first lightly doped well region 212.
Then, a field insulator region 250 is formed in the first lightly doped well region 212, and is formed between the N+ region 224 and the P+ region 226. A field insulator region 252 is formed in the first lightly doped well region 212, and is formed between the P+ region 226 and P+ region 234. A field insulator region 254 is formed between the substrate 200 and the second lightly doped well region 214, such that the field insulator region 254 overlaps a second junction 220 between the substrate 200 and the second lightly doped well region 214. A field insulator region 256 is formed in the second lightly doped well region 214 and the third lightly doped well region 216, such that the field insulator region 256 overlaps a third junction 222 between the second lightly doped well region 214 and the third lightly doped well region 216. A field insulator region 258 is formed in the third lightly doped well region 216. As the PMSCR with the N guard ring structure 110, the N well guard ring 214 is used to collect the electrons from the cathode 280 toward the anode 260. Even though the power-zapping immunity is improved when SCR triggers, nevertheless the N well guard ring 214 may attach to the same or another high voltage to collect electrons such that the ESD performance will be degraded.
For PMSCR with guard ring 110 (as shown in FIG. 1) or 210 (as shown in FIG. 2), when the voltage of the anode 150 or 260 rises to the breakdown voltage of the junction between N-well 112 or 212 and P+ 128 or 234, lots of electron-hole pairs will be generated in this junction. Electrons are attracted by the high potential of the anode 150 or 260, and holes by the low potential of the cathode 160 or 280. When electrons flow into the anode, the parasitic PNP BJT will turn on and inject holes into P-well 114 or 216. When holes flow into the cathode, the parasitic NPN BJT will turn on and inject electrons in to N-well 112 or 212. Thus, these two BJT turn on each other and a positive feedback starts. It causes PMSCR snapback and enters the low-impedance holding region. This holding region can bypass ESD current effectively during ESD event. The power zapping issue, however, will occur if it enters the holding region during normal operation. As a result, N+ 126 or N-well 214 guard ring can collect electrons to prevent them from flowing into the anode to turn on the parasitic PNP BJT, and then prevent PMSCR from entering the holding region and causing the power-zapping issue. During ESD event, however, the ESD robustness of PMSCR will be worse since it cannot enter the holding region easily.